中華大學107學年第3學期教學大綱-數位邏輯設計
Syllabus Summer 2019, Chung Hua University
| 科目名稱 | Course Title | |
| 數位邏輯設計 | Digital Logic Deign | |
| 教學目標 | Course Objective | |
| 講授數位邏輯系統的設計原理, 由數位系統與二進位數字開始, 接著說明布林代數與邏輯閘, 進行邏輯閘層級的化簡, 介紹組合邏輯, 同步序向邏輯, 最後介紹暫存器與計數器. 課程包含 Verilog 硬體描述語言的實務, 課程作業包含 Verilog HDL 程式設計 | This course teaches the design principles of digital logic systems, including digital systems and binary numbers, Boolean algebra and logic gates, gate－level minimization, combinational logic, synchronous sequential logic, registers and counters. The course contains the practice of Verilog hardware description language, and the homeworks include Verilog HDL programming problems. | |
| 課程類別/Course Type：■日間部/Day Time ■必修/Required Course | ||
| 系別： | 電子工程學系 | Department： | Department of Electronics Engineering |
| 任課教師： | 許騰仁 | Instructor： | Terng-Ren Hsu |
| 授課班級： | 電子二甲 | Class： | EL2A, 4-Year(Univ.) |
| 教師職等： | 助理教授 | Faculty Position： | Assistant Professor |
| 電子信箱： | trhsu@chu.edu.tw | E-mail： | trhsu@chu.edu.tw |
| 學分數： | 3 | Credits： | 3 |
| 上課時數： | 3 | Hours： | 3 |
| 辦公室： | 工程一館509室 | Office： | Room 509,Engineering Building I |
| 師生互動時間： | 週二10:20~12:10 週四10:20~12:10 |
Office Hours： | Tue 10:20-12:10 Thu 10:20-12:10 |
| 週次 Week |
教學內容 | Topics |
| 01 | 數位邏輯設計簡介 | Introduction to Digital Logic Design |
| 02 | 數位系統與二進位數字 | Digital Systems and Binary Numbers |
| 03 | 數位系統與二進位數字 | Digital Systems and Binary Numbers |
| 04 | 布林代數與邏輯閘 | Boolean Algebra and Logic Gates |
| 05 | 布林代數與邏輯閘 | Boolean Algebra and Logic Gates |
| 06 | 邏輯閘階層的化簡 | Gate-level Minimization |
| 07 | 邏輯閘階層的化簡 | Gate-level Minimization |
| 08 | 邏輯閘階層的化簡 (實驗 1) | Gate-level Minimization (Lab. 01) |
| 09 | 複習與期中考 | Review and Midterm |
| 10 | 組合邏輯 (實驗 2) | Combinational Logic (Lab. 02) |
| 11 | 組合邏輯 (實驗 3) | Combinational Logic (Lab. 03) |
| 12 | 組合邏輯 (實驗 4) | Combinational Logic (Lab. 04) |
| 13 | 同步序向邏輯 (實驗 5) | Synchronous Sequential Logic (Lab. 05) |
| 14 | 同步序向邏輯 (實驗 6) | Synchronous Sequential Logic (Lab. 06) |
| 15 | 同步序向邏輯 (實驗 7) | Synchronous Sequential Logic (Lab. 07) |
| 16 | 暫存器與計數器 (實驗 8) | Registers and Counters (Lab. 08) |
| 17 | 電子工程的專業倫理簡介 | Introduction to Professional Ethics in Electronics Engineering |
| 18 | 期末考 | Final Examination |
| 課堂用書(請遵守智慧財產權、不得非法影印) Text Book (Obey Intellectual Property Rights; do not make illegal copies.) |
||
| Digital Design, 5th Ed., M. Morris Mano ＆ Michael D. Ciletti, Pearson, 2012. | ||
| 參考書目/Reference Books | ||
| Fundamentals of Logic Design, 7th Ed., Charles H. Roth, Jr. ＆ Larry L. Kinney, Cengage Learning, 2014. | ||
| 成績評量 | Evaluation | |
| 1.出席10% 2.作業、平時測驗、程式設計與報告30% 3.期中考30% 4.期末考30% |
1.Attendance 10% 2.Homeworks, Quizzes, Programming and Reports 30% 3.Middle Examination 30% 4.Final Examination 30% |
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| 教學方法 | Methods of Instruction | |
| 1.作業 2.考試 |
1.Homework 2.Test |
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| 課程要求 | Course Policies and Requirements | |
| 1.不可缺曠、遲到 2.不可聊天 3.不穿拖鞋 4.不可用手機撥、接 |
1.Arrive on Time 2.No talking 3.No wearing slippers 4.Close cell phone |
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課程進度將依學生之學習狀況做適度的調整 |
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